Content deleted Content added
rv; still no concensus, seems to break existing usage of the template |
T4C Fantasy (talk | contribs) Undid revision 511138782 by Ruud Koot (talk) now this is just candalism, i have not broke anything on this tempalte, refer to talk page before reverting, |
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{{infobox |
{{infobox |
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| title = {{{name|<includeonly>{{PAGENAME}}</includeonly>}}} |
| title = {{{name|<includeonly>{{PAGENAME}}</includeonly>}}} |
||
| image = {{#if:{{{image|}}}|[[Image:{{{image}}}|{{{image_size|frameless}}}]]}} |
| image = {{#if:{{{image|}}}|[[Image:{{{image|}}}|{{{image_size|frameless}}}]]}} |
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| caption = {{{caption|}}} |
| caption = {{{caption|}}} |
||
| label1 = Released |
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| data1 = {{{created|}}} {{#if:{{{produced-end|}}}|From {{{produced-start}}} to {{{produced-end}}}|{{{produced-start|}}}}} |
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| label1 = Produced |
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| label2 = Designed by |
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| data1 = {{#if:{{{produced-end|}}}|From {{{produced-start}}} to {{{produced-end}}}|{{{produced-start|}}}}} |
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| data2 = {{{designfirm|}}} |
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| label2 = Marketed by |
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| |
| label3 = Marketed by |
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| data3 = {{{soldby|}}} {{unbulleted list |
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| label3 = Designed by |
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| |
| {{{soldby1|}}} |
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| {{{soldby2|}}} |
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| label4 = Common manufacturer(s) |
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| {{{soldby3|}}} |
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| data4 = {{unbulleted list |
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| {{{soldby4|}}} |
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| {{{soldby5|}}} |
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}} |
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| label4 = Manufacturer(s) |
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| data4 = {{{manufacturers|}}} {{unbulleted list |
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| {{{manuf1|}}} |
| {{{manuf1|}}} |
||
| {{{manuf2|}}} |
| {{{manuf2|}}} |
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Line 17: | Line 22: | ||
| {{{manuf4|}}} |
| {{{manuf4|}}} |
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| {{{manuf5|}}} |
| {{{manuf5|}}} |
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| {{{manuf6|}}} |
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}} |
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| {{{manuf7|}}} |
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| label5 = Max. [[Central processing unit|CPU]] [[clock rate]] |
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| {{{manuf8|}}} |
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| data5 = {{#if:{{{slowest|}}}|{{{slowest}}} {{{slow-unit|GHz}}}}} {{#if:{{{fastest|}}}| to {{{fastest}}} {{{fast-unit|GHz}}}}} |
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| {{{manuf9|}}} |
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| label6 = [[Front side bus|FSB]] speeds |
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}} |
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| data6 = {{#if:{{{fsb-slowest|}}}|{{{fsb-slowest}}} {{{fsb-slow-unit|GHz}}}}} {{#if:{{{fsb-fastest|}}}| to {{{fsb-fastest}}} {{{fsb-fast-unit|GHz}}}}} |
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| label5 = Model(s) |
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| label7 = [[HyperTransport]] speeds |
|||
| data5 = {{{model|}}} {{unbulleted list |
|||
| data7 = {{#if:{{{hypertransport-slowest|}}}|{{{hypertransport-slowest}}} {{{hypertransport-slow-unit|GT/s}}}}} {{#if:{{{hypertransport-fastest|}}}| to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit|GT/s}}}}} |
|||
| {{{model1|}}} |
|||
| label8 = [[Intel QuickPath Interconnect|QPI]] speeds |
|||
| {{{model2|}}} |
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| data8 = {{#if:{{{qpi-slowest|}}}|{{{qpi-slowest}}} {{{qpi-slow-unit|GT/s}}}}} {{#if:{{{qpi-fastest|}}}| to {{{qpi-fastest}}} {{{qpi-fast-unit|GT/s}}}}} |
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| {{{model3|}}} |
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| label9 = [[Direct Media Interface|DMI]] speeds |
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| {{{model4|}}} |
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| data9 = {{#if:{{{dmi-slowest|}}}|{{{dmi-slowest}}} {{{dmi-slow-unit|GT/s}}}}} {{#if:{{{dmi-fastest|}}}| to {{{dmi-fastest}}} {{{dmi-fast-unit|GT/s}}}}} |
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| {{{model5|}}} |
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| label10 = Min. feature size |
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| {{{model6|}}} |
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| data10 = {{#if:{{{size-from|}}}|{{{size-from|}}} {{#if:{{{size-to|}}}| to {{{size-to}}}}}}} |
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| {{{model7|}}} |
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| label11 = [[Instruction set]] |
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| |
| {{{model8|}}} |
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| {{{model9|}}} |
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| label12 = [[Microarchitecture]] |
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}} |
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| data12 = {{{microarch|}}} |
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| label6 = [[Multi-core (computing)|Cores]] |
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| label13 = CPUID code |
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| |
| data6 = {{{cores-nothread|}}} {{{numcores|}}} |
||
| label7 = [[Multi-core (computing)|Cores]]<br>(Threads) |
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| label14 = Product code |
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| |
| data7 = {{{cores|}}} {{unbulleted list |
||
| {{{cores1|}}} |
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| label15 = [[Multi-core (computing)|Cores]] |
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| |
| {{{cores2|}}} |
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| {{{cores3|}}} |
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| label16 = L1 [[CPU cache|cache]] |
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}} |
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| data16 = {{{l1cache|}}} |
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| label8 = Transistors<br>[[Semiconductor_device_fabrication|Fabrication]] |
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| label17 = L2 cache |
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| |
| data8 = {{{transistors-nostep|}}} {{unbulleted list |
||
| {{{transistors-nostep1|}}} |
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| label18 = L3 cache |
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| |
| {{{transistors-nostep2|}}} |
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| {{{transistors-nostep3|}}} |
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| label19 = Application |
|||
| |
| {{{transistors-nostep4|}}} |
||
| {{{transistors-nostep5|}}} |
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| label20 = Predecessor |
|||
| |
| {{{transistors-nostep6|}}} |
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| {{{transistors-nostep7|}}} |
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| label26 = Variant |
|||
| |
| {{{transistors-nostep8|}}} |
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| {{{transistors-nostep9|}}} |
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| label21 = Successor |
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}} |
|||
| data21 = {{{successor|}}} |
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| label9 = Transistors<br>[[Semiconductor_device_fabrication|Fabrication]]<br>(Steppings) |
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| data22 = {{{co-processor|}}} |
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| data9 = {{{transistors|}}} {{unbulleted list |
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| label22 = Co-processor |
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| {{{transistors1|}}} |
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| label23 = Socket(s) |
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| {{{transistors2|}}} |
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| data23 = {{unbulleted list |
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| {{{transistors3|}}} |
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| {{{transistors4|}}} |
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| {{{transistors5|}}} |
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| {{{transistors6|}}} |
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| {{{transistors7|}}} |
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| {{{transistors8|}}} |
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| {{{transistors9|}}} |
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}} |
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| label10 = [[Central processing unit|CPU]] Clock(s) |
|||
| data10 = {{{clock|}}} {{{clocks|}}} {{#if:{{{slowest|}}}|{{{slowest}}} {{{slow-unit|GHz}}}}} {{#if:{{{fastest|}}}| to {{{fastest}}} {{{fast-unit|GHz}}}}} |
|||
| label11 = [[Graphics processing unit|GPU]] Clock(s) |
|||
| data11 = {{{gpu|}}} {{unbulleted list |
|||
| {{{gpu1|}}} |
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| {{{gpu2|}}} |
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| {{{gpu3|}}} |
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| {{{gpu4|}}} |
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}} |
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| label12 = [[Front side bus|FSB]] Speeds |
|||
| data12 = {{{fsb|}}} {{#if:{{{fsb-slowest|}}}|{{{fsb-slowest}}} {{{fsb-slow-unit|GHz}}}}} {{#if:{{{fsb-fastest|}}}| to {{{fsb-fastest}}} {{{fsb-fast-unit|GHz}}}}} |
|||
| label13 = [[HyperTransport]] Speeds |
|||
| data13 = {{#if:{{{hypertransport-slowest|}}}|{{{hypertransport-slowest}}} {{{hypertransport-slow-unit|GT/s}}}}} {{#if:{{{hypertransport-fastest|}}}| to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit|GT/s}}}}} |
|||
| label14 = [[Intel QuickPath Interconnect|QPI]] Speeds |
|||
| data14 = {{{qpi|}}} {{#if:{{{qpi-slowest|}}}|{{{qpi-slowest}}} {{{qpi-slow-unit|GT/s}}}}} {{#if:{{{qpi-fastest|}}}| to {{{qpi-fastest}}} {{{qpi-fast-unit|GT/s}}}}} |
|||
| label15 = [[Direct Media Interface|DMI]] Speeds |
|||
| data15 = {{{dmi|}}} {{#if:{{{dmi-slowest|}}}|{{{dmi-slowest}}} {{{dmi-slow-unit|GT/s}}}}} {{#if:{{{dmi-fastest|}}}| to {{{dmi-fastest}}} {{{dmi-fast-unit|GT/s}}}}} |
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| label16 = [[CPU cache|Cache]] |
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| data16 = {{{cache|}}} {{{cachee|}}} {{{cachex|}}} |
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| label17 = [[CPU cache|L1 Cache]] |
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| data17 = {{{l1cache|}}} |
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| label18 = [[CPU cache|L2 Cache]] |
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| data18 = {{{l2cache|}}} |
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| label19 = [[CPU cache|L3 Cache]] |
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| data19 = {{{l3cache|}}} |
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| label20 = [[CPU cache|L4 Cache]] |
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| data20 = {{{l4cache|}}} |
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| label21 = [[CPU cache|LL Cache]] |
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| data21 = {{{llcache|}}} |
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| label22 = [[CPU Architecture]] |
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| data22 = {{{soon-arch|}}} {{unbulleted list |
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| {{{arch1|}}} |
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| {{{arch2|}}} |
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| {{{arch3|}}} |
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| {{{arch4|}}} |
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| {{{arch5|}}} |
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}} |
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| label23 = [[Microarchitecture]] |
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| data23 = {{{microarch|}}} |
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| label24 = [[Instruction Set]](s) |
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| data24 = {{{arch|}}} {{{instructions|}}} {{unbulleted list |
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| {{{arch01|}}} |
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| {{{arch02|}}} |
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| {{{arch03|}}} |
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| {{{arch04|}}} |
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| {{{arch05|}}} |
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| {{{arch06|}}} |
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| {{{instructions1|}}} |
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| {{{instructions2|}}} |
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| {{{instructions3|}}} |
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| {{{instructions4|}}} |
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| {{{instructions5|}}} |
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| {{{instructions6|}}} |
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| {{{instructions7|}}} |
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| {{{instructions8|}}} |
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| {{{instructions9|}}} |
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}} |
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| label25 = [[X86|Extensions]] |
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| data25 = {{{extensions|}}} {{unbulleted list |
|||
| {{{extensions1|}}} |
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| {{{extensions2|}}} |
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| {{{extensions3|}}} |
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| {{{extensions4|}}} |
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| {{{extensions5|}}} |
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| {{{extensions6|}}} |
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| {{{extensions7|}}} |
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| {{{extensions8|}}} |
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| {{{extensions9|}}} |
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}} |
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| label26 = CPUID Code(s) |
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| data26 = {{{cpuid|}}} {{unbulleted list |
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| {{{cpuid1|}}} |
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| {{{cpuid2|}}} |
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| {{{cpuid3|}}} |
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| {{{cpuid4|}}} |
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| {{{cpuid5|}}} |
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}} |
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| label27 = Product Code(s) |
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| data27 = {{{code|}}} {{unbulleted list |
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| {{{code1|}}} |
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| {{{code2|}}} |
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| {{{code3|}}} |
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| {{{code4|}}} |
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| {{{code5|}}} |
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}} |
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| label28 = Socket(s) |
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| data28 = {{{socket|}}} {{unbulleted list |
|||
| {{{sock1|}}} |
| {{{sock1|}}} |
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| {{{sock2|}}} |
| {{{sock2|}}} |
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| {{{sock9|}}} |
| {{{sock9|}}} |
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}} |
}} |
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| |
| label29 = Package(s) |
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| |
| data29 = {{unbulleted list |
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| {{{pack1|}}} |
| {{{pack1|}}} |
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| {{{pack2|}}} |
| {{{pack2|}}} |
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| {{{pack4|}}} |
| {{{pack4|}}} |
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| {{{pack5|}}} |
| {{{pack5|}}} |
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| {{{pack6|}}} |
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| {{{pack7|}}} |
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| {{{pack8|}}} |
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| {{{pack9|}}} |
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}} |
}} |
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| |
| label30 = Core name(s) |
||
| |
| data30 = {{unbulleted list |
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| {{{core1|}}} |
| {{{core1|}}} |
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| {{{core2|}}} |
| {{{core2|}}} |
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| {{{core9|}}} |
| {{{core9|}}} |
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}} |
}} |
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| |
| label31 = Brand name(s) |
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| |
| data31 = {{unbulleted list |
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| {{{brand1|}}} |
| {{{brand1|}}} |
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| {{{brand2|}}} |
| {{{brand2|}}} |
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| {{{brand8|}}} |
| {{{brand8|}}} |
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| {{{brand9|}}} |
| {{{brand9|}}} |
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}} |
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| label32 = Platform(s) |
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| data32 = {{{platform|}}} {{unbulleted list |
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| {{{platform1|}}} |
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| {{{platform2|}}} |
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| {{{platform3|}}} |
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| {{{platform4|}}} |
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| {{{platform5|}}} |
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}} |
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| label33 = Co-processor |
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| data33 = {{{coprocessor|}}} {{{co-processor|}}} |
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| label34 = Predecessor |
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| data34 = {{{predecessor|}}} {{unbulleted list |
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| {{{predecessor1|}}} |
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| {{{predecessor2|}}} |
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| {{{predecessor3|}}} |
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}} |
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| label35 = Variant |
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| data35 = {{{variant|}}} {{unbulleted list |
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| {{{variant1|}}} |
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| {{{variant2|}}} |
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| {{{variant3|}}} |
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}} |
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| label36 = Successor |
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| data36 = {{{successor|}}} {{unbulleted list |
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| {{{successor1|}}} |
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| {{{successor2|}}} |
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| {{{successor3|}}} |
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}} |
}} |
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}}<noinclude>{{documentation}}</noinclude> |
}}<noinclude>{{documentation}}</noinclude> |
Revision as of 23:30, 6 September 2012
Template documentation[view] [edit] [history] [purge]
This template is for CPUs, SoCs and SiPs. For generic hardware components, see Template:Infobox computer hardware.
[[Image:{{{image}}}|{{{image_size}}}]] | |
Released | From {{{produced-start}}} to {{{produced-end}}} |
---|---|
Designed by | {{{designfirm}}} |
Marketed by | {{{soldby}}} |
Manufacturer(s) |
|
Model(s) |
|
Cores | {{{numcores}}} |
Transistors Fabrication (Steppings) | {{{transistors}}} |
CPU Clock(s) | {{{slowest}}} {{{slow-unit}}} to {{{fastest}}} {{{fast-unit}}} |
GPU Clock(s) | {{{gpu}}} |
FSB Speeds | {{{fsb-slowest}}} {{{fsb-slow-unit}}} to {{{fsb-fastest}}} {{{fsb-fast-unit}}} |
HyperTransport Speeds | {{{hypertransport-slowest}}} {{{hypertransport-slow-unit}}} to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit}}} |
QPI Speeds | {{{qpi-slowest}}} {{{qpi-slow-unit}}} to {{{qpi-fastest}}} {{{qpi-fast-unit}}} |
DMI Speeds | {{{dmi-slowest}}} {{{dmi-slow-unit}}} to {{{dmi-fastest}}} {{{dmi-fast-unit}}} |
L1 Cache | {{{l1cache}}} |
L2 Cache | {{{l2cache}}} |
L3 Cache | {{{l3cache}}} |
L4 Cache | {{{l4cache}}} |
LL Cache | {{{llcache}}} |
Microarchitecture | {{{microarch}}} |
Instruction Set(s) | {{{arch}}} {{{instructions}}} |
Extensions | {{{extensions}}} |
CPUID Code(s) | {{{cpuid}}} |
Product Code(s) | {{{code}}} |
Socket(s) |
|
Package(s) |
|
Core name(s) |
|
Brand name(s) |
|
Co-processor | {{{co-processor}}} |
Predecessor | {{{predecessor}}} |
Variant | {{{variant}}} |
Successor | {{{successor}}} |
{{Infobox CPU
| name =
| hide_subheadings =
| image =
| image_size =
| alt =
| caption =
<!----------------- General Info ----------------->
| launching =
| produced-start =
| produced-end =
| soldby =
| designfirm =
| manuf1 = <!-- manuf1..10 -->
| cpuid =
| code =
<!----------------- Performance ------------------>
| slowest =
| fastest =
| slow-unit =
| fast-unit =
| fsb-slowest =
| fsb-fastest =
| fsb-slow-unit =
| fsb-fast-unit =
| hypertransport-slowest =
| hypertransport-fastest =
| hypertransport-slow-unit =
| hypertransport-fast-unit =
| qpi-slowest =
| qpi-fastest =
| qpi-slow-unit =
| qpi-fast-unit =
| dmi-slowest =
| dmi-fastest =
| dmi-slow-unit =
| dmi-fast-unit =
| data-width =
| address-width =
| virtual-width =
<!-------------------- Cache --------------------->
| l1cache =
| l2cache =
| l3cache =
| l4cache =
| llcache =
<!------- Architecture and classification -------->
| application =
| size-from =
| size-to =
| microarch =
| arch =
| instructions =
| extensions =
| numinstructions =
<!----------- Physical specifications ------------>
| transistors =
| numcores =
| amountmemory =
| gpu =
| co-processor =
| pack1 = <!-- pack1..9 -->
| sock1 = <!-- sock1..9 -->
<!--------- Products, models, variants ----------->
| core1 = <!-- core1..9 -->
| pcode1 = <!-- pcode1..9 -->
| model1 = <!-- model1..9 -->
| brand1 = <!-- brand1..9 -->
| variant =
<!------------------ History ------------------->
| predecessor =
| successor =
<!------------------ Support status ------------------->
| support status =
}}
Usage
{{Infobox CPU
| name = <!-- Device Name -->
| hide_subheadings = <!-- Any value here will hide the subheadings -->
| image = <!-- An image to show in the infobox -->
| image_size = <!-- Size of the image (defaults to 200px) -->
| alt = <!-- Mouse over text for the image -->
| caption = <!-- A caption for the image -->
<!----------------- General Info ------------------------------------------------------------------------------------->
| launching = <!-- Use if a CPU microarchitecture/series has not yet launched but its official release date is known -->
| produced-start = <!-- When production began / Launch date →see talkpage section #Dates -->
| produced-end = <!-- When production ended / Discontinued date →see talkpage section #Dates -->
| soldby = <!-- Often, but not always, the same as the designfirm and/or manuf1 -->
| designfirm = <!-- Often, but not always, the same as manuf1 and/or soldby -->
| manuf1 = <!-- (1..10) Common manufacturers of the device -->
| cpuid = <!-- CPUID or PVR value -->
| code = <!-- numerical identifier for the CPU (product code) -->
<!----------------- Performance -------------------------------------------------------------------------------------->
| slowest = <!-- Lowest maximum CPU clock -->
| fastest = <!-- Highest maximum CPU clock -->
| slow-unit = <!-- Unit for slow speed. Default: GHz -->
| fast-unit = <!-- Unit for fast speed. Default: GHz -->
| fsb-slowest = <!-- Slowest FSB speed -->
| fsb-fastest = <!-- Fastest FSB speed -->
| fsb-slow-unit = <!-- Unit for slow speed. Default: MHz -->
| fsb-fast-unit = <!-- Unit for fast speed. Default: MHz -->
| hypertransport-slowest = <!-- Slowest HyperTransport speed -->
| hypertransport-fastest = <!-- Fastest HyperTransport speed -->
| hypertransport-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| hypertransport-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| qpi-slowest = <!-- Slowest QPI (QuickPath Interconnect) speed -->
| qpi-fastest = <!-- Fastest QPI speed -->
| qpi-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| qpi-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| dmi-slowest = <!-- Slowest DMI (Direct Media Interface) speed -->
| dmi-fastest = <!-- Fastest DMI speed -->
| dmi-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| dmi-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| data-width = <!-- Data bus width in bits -->
| address-width = <!-- Address bus width in bits -->
| virtual-width = <!-- Virtual address bus width in bits -->
<!-------------------- Cache ----------------------------------------------------------------------------------------->
| l1cache = <!-- Level 1 cache size -->
| l2cache = <!-- Level 2 cache size -->
| l3cache = <!-- Level 3 cache size -->
| l4cache = <!-- Level 4 cache size -->
| llcache = <!-- Last Level cache size -->
<!------- Architecture and classification ---------------------------------------------------------------------------->
| application = <!-- Typical application (Embedded, Mobile, Desktop, Server) -->
| size-from = <!-- First fabrication size -->
| size-to = <!-- Second fabrication size -->
| microarch = <!-- Microarchitecture of the CPU -->
| arch = <!-- Instruction set architecture (ISA) that the CPU implements →see talkpage section #Architecture -->
| instructions = <!-- Instruction sets →see talkpage section #Architecture -->
| extensions = <!-- Extensions to the instructions -->
| numinstructions = <!-- Number of instructions -->
<!----------- Physical specifications -------------------------------------------------------------------------------->
| transistors = <!-- Number of transistors, transistor count -->
| numcores = <!-- Number of cores (2 for dual-core) -->
| amountmemory = <!-- Amount of system RAM for SoC or SiP -->
| gpu = <!-- Integrated GPU -->
| co-processor = <!-- A [[co-processor]](s) used together -->
| pack1 = <!-- (1..5) Names of CPU packages -->
| sock1 = <!-- (1..9) Names of the sockets that the CPU was made for -->
<!--------- Products, models, variants ------------------------------------------------------------------------------->
| core1 = <!-- (1..9) Names of the cores →see talkpage section "Names (Products, models, variants)" -->
| pcode1 = <!-- (1..9) Product code names →see talkpage section "Names (Products, models, variants)" -->
| model1 = <!-- (1..9) Model names →see talkpage section "Names (Products, models, variants)" -->
| brand1 = <!-- (1..9) Marketing names of the CPU -->
| variant = <!-- Variants in the same family and generation →see talkpage section "Names (Products, models, variants)" -->
<!------------------ History --------------------------------------------------------------------------------------->
| predecessor = <!-- What CPU came before -->
| successor = <!-- What CPU came after -->
<!------------------ Support status --------------------------------------------------------------------------------->
| support status = <!-- Current support status -->
}}
- All fields, except
name
are optional - The following parameters are deprecated:
created
→better: produced-start
,produced-end
clock
→better: slowest
,fastest
fsb
→better: fsb-slowest
,fsb-fastest
cores
,cores1
→better: numcores
socket
→better: sock1
...sock9
manuf
,core
,sock
,pack
,arch
, andmicroarch
are AutoLinks, so you can use plain text or a link for them.- The numbered attributes mean that there is allowance for multiples.
- See the talk page for some examples which show the full usage of this infobox in a few combinations.