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Recent edits break compatibility with existing use cases |
T4C Fantasy (talk | contribs) Undid revision 510767141 by ﬥ (talk) incorrect / reverting edit that breaks all compatiblity with intel cpus |
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| image = {{#if:{{{image|}}}|[[Image:{{{image}}}|{{{image_size|frameless}}}]]}} |
| image = {{#if:{{{image|}}}|[[Image:{{{image}}}|{{{image_size|frameless}}}]]}} |
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| caption = {{{caption|}}} |
| caption = {{{caption|}}} |
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| label1 = Released |
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| |
| data1 = {{{created|}}} |
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{{#if:{{{produced-end|}}}|From {{{produced-start}}} to {{{produced-end}}}|{{{produced-start|}}}}} |
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| label2 = Marketed by |
| label2 = Marketed by |
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| data2 = {{{soldby|}}} |
| data2 = {{{soldby|}}} |
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| label3 = |
| label3 = Manufacturer(s) |
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| data3 = {{{ |
| data3 = {{{manufacturers|}}} |
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|{{{manuf2|}}} |
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|{{{manuf3|}}} |
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|{{{manuf4|}}} |
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|{{{manuf5|}}} |
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| data5 = {{{cores-nothread|}}} |
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| label6 = [[Multi-core (computing)|Cores]]<br>(Threads) |
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| label7 = Transistors<br>[[Semiconductor_device_fabrication|Fabrication]] |
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| data7 = {{{transistors-nostep|}}} |
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| label8 = Transistors<br>[[Semiconductor_device_fabrication|Fabrication]]<br>(Steppings) |
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| data9 = {{#if:{{{dmi-slowest|}}}|{{{dmi-slowest}}} {{{dmi-slow-unit|GT/s}}}}} {{#if:{{{dmi-fastest|}}}| to {{{dmi-fastest}}} {{{dmi-fast-unit|GT/s}}}}} |
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| label10 = Min. feature size |
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| data10 = {{#if:{{{size-from|}}}|{{{size-from|}}} {{#if:{{{size-to|}}}| to {{{size-to}}}}}}} |
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| label10 = [[Graphics processing unit|GPU]] Clock(s) |
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| data10 = {{{gpu|}}} |
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| data11 = {{{fsb|}}} |
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| label14 = Product code |
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| data12 = {{#if:{{{hypertransport-slowest|}}}|{{{hypertransport-slowest}}} {{{hypertransport-slow-unit|GT/s}}}}} |
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{{#if:{{{hypertransport-fastest|}}}| to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit|GT/s}}}}} |
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| data13 = {{{qpi|}}} |
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| data14 = {{{dmi|}}} |
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| label15 = [[CPU cache|Cache]] |
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| data15 = {{{cache|}}} |
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{{{cachee|}}} |
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{{{cachex|}}} |
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| data16 = {{{l1cache|}}} |
| data16 = {{{l1cache|}}} |
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| label17 = |
| label17 = [[CPU cache|L2 Cache]] |
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| data17 = {{{l2cache|}}} |
| data17 = {{{l2cache|}}} |
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| label18 = |
| label18 = [[CPU cache|L3 Cache]] |
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| data18 = {{{l3cache|}}} |
| data18 = {{{l3cache|}}} |
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| label19 = |
| label19 = [[CPU cache|L4 Cache]] |
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| data19 = {{{ |
| data19 = {{{l4cache|}}} |
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| label20 = |
| label20 = [[CPU cache|LL Cache]] |
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| data20 = {{{ |
| data20 = {{{llcache|}}} |
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| data21 = {{{arch|}}} |
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| data22 = {{{microarch|}}} |
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| data23 = {{{cpuid|}}} |
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| |
| label24 = Product Code(s) |
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| data24 = {{{code|}}} |
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| label25 = Socket(s) |
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| data25 = {{{socket|}}} |
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{{unbulleted list |
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| {{{sock1|}}} |
| {{{sock1|}}} |
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| {{{sock2|}}} |
| {{{sock2|}}} |
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| {{{sock9|}}} |
| {{{sock9|}}} |
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}} |
}} |
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| label26 = Package(s) |
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| |
| data26 = {{unbulleted list |
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| {{{pack1|}}} |
| {{{pack1|}}} |
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| {{{pack2|}}} |
| {{{pack2|}}} |
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| {{{pack5|}}} |
| {{{pack5|}}} |
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}} |
}} |
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| label27 = Core name(s) |
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| data27 = {{unbulleted list |
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| {{{core1|}}} |
| {{{core1|}}} |
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| {{{core2|}}} |
| {{{core2|}}} |
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| {{{core9|}}} |
| {{{core9|}}} |
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}} |
}} |
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| |
| label28 = Brand name(s) |
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| |
| data28 = {{unbulleted list |
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| {{{brand1|}}} |
| {{{brand1|}}} |
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| {{{brand2|}}} |
| {{{brand2|}}} |
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| {{{brand9|}}} |
| {{{brand9|}}} |
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}} |
}} |
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| label29 = Platform(s) |
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| data29 = {{{platform|}}} |
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| label30 = Co-processor |
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| data30 = {{{coprocessor|}}} |
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| label31 = Predecessor |
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| data31 = {{{predecessor|}}} |
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| data32 = {{{variant|}}} |
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⚫ | |||
| data33 = {{{successor|}}} |
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}}<noinclude>{{documentation}}</noinclude> |
}}<noinclude>{{documentation}}</noinclude> |
Revision as of 20:39, 4 September 2012
Template documentation[view] [edit] [history] [purge]
This template is for CPUs, SoCs and SiPs. For generic hardware components, see Template:Infobox computer hardware.
[[Image:{{{image}}}|{{{image_size}}}]] | |
Released | From {{{produced-start}}} to {{{produced-end}}} |
---|---|
Marketed by | {{{soldby}}} |
Manufacturer(s) |
|
Cores | {{{numcores}}} |
Transistors Fabrication (Steppings) | {{{transistors}}} |
CPU Clock(s) | {{{slowest}}} {{{slow-unit}}} to {{{fastest}}} {{{fast-unit}}} |
GPU Clock(s) | {{{gpu}}} |
FSB Speeds | {{{fsb-slowest}}} {{{fsb-slow-unit}}} to {{{fsb-fastest}}} {{{fsb-fast-unit}}} |
HyperTransport Speeds | {{{hypertransport-slowest}}} {{{hypertransport-slow-unit}}} to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit}}} |
QPI Speeds | {{{qpi-slowest}}} {{{qpi-slow-unit}}} to {{{qpi-fastest}}} {{{qpi-fast-unit}}} |
DMI Speeds | {{{dmi-slowest}}} {{{dmi-slow-unit}}} to {{{dmi-fastest}}} {{{dmi-fast-unit}}} |
L1 Cache | {{{l1cache}}} |
L2 Cache | {{{l2cache}}} |
L3 Cache | {{{l3cache}}} |
L4 Cache | {{{l4cache}}} |
LL Cache | {{{llcache}}} |
Instruction Set(s) | {{{arch}}} |
Microarchitecture | {{{microarch}}} |
CPUID Code(s) | {{{cpuid}}} |
Product Code(s) | {{{code}}} |
Socket(s) |
|
Package(s) |
|
Core name(s) |
|
Brand name(s) |
|
Co-processor | {{{co-processor}}} |
Predecessor | {{{predecessor}}} |
Variant | {{{variant}}} |
Successor | {{{successor}}} |
{{Infobox CPU
| name =
| hide_subheadings =
| image =
| image_size =
| alt =
| caption =
<!----------------- General Info ----------------->
| launching =
| produced-start =
| produced-end =
| soldby =
| designfirm =
| manuf1 = <!-- manuf1..10 -->
| cpuid =
| code =
<!----------------- Performance ------------------>
| slowest =
| fastest =
| slow-unit =
| fast-unit =
| fsb-slowest =
| fsb-fastest =
| fsb-slow-unit =
| fsb-fast-unit =
| hypertransport-slowest =
| hypertransport-fastest =
| hypertransport-slow-unit =
| hypertransport-fast-unit =
| qpi-slowest =
| qpi-fastest =
| qpi-slow-unit =
| qpi-fast-unit =
| dmi-slowest =
| dmi-fastest =
| dmi-slow-unit =
| dmi-fast-unit =
| data-width =
| address-width =
| virtual-width =
<!-------------------- Cache --------------------->
| l1cache =
| l2cache =
| l3cache =
| l4cache =
| llcache =
<!------- Architecture and classification -------->
| application =
| size-from =
| size-to =
| microarch =
| arch =
| instructions =
| extensions =
| numinstructions =
<!----------- Physical specifications ------------>
| transistors =
| numcores =
| amountmemory =
| gpu =
| co-processor =
| pack1 = <!-- pack1..9 -->
| sock1 = <!-- sock1..9 -->
<!--------- Products, models, variants ----------->
| core1 = <!-- core1..9 -->
| pcode1 = <!-- pcode1..9 -->
| model1 = <!-- model1..9 -->
| brand1 = <!-- brand1..9 -->
| variant =
<!------------------ History ------------------->
| predecessor =
| successor =
<!------------------ Support status ------------------->
| support status =
}}
Usage
{{Infobox CPU
| name = <!-- Device Name -->
| hide_subheadings = <!-- Any value here will hide the subheadings -->
| image = <!-- An image to show in the infobox -->
| image_size = <!-- Size of the image (defaults to 200px) -->
| alt = <!-- Mouse over text for the image -->
| caption = <!-- A caption for the image -->
<!----------------- General Info ------------------------------------------------------------------------------------->
| launching = <!-- Use if a CPU microarchitecture/series has not yet launched but its official release date is known -->
| produced-start = <!-- When production began / Launch date →see talkpage section #Dates -->
| produced-end = <!-- When production ended / Discontinued date →see talkpage section #Dates -->
| soldby = <!-- Often, but not always, the same as the designfirm and/or manuf1 -->
| designfirm = <!-- Often, but not always, the same as manuf1 and/or soldby -->
| manuf1 = <!-- (1..10) Common manufacturers of the device -->
| cpuid = <!-- CPUID or PVR value -->
| code = <!-- numerical identifier for the CPU (product code) -->
<!----------------- Performance -------------------------------------------------------------------------------------->
| slowest = <!-- Lowest maximum CPU clock -->
| fastest = <!-- Highest maximum CPU clock -->
| slow-unit = <!-- Unit for slow speed. Default: GHz -->
| fast-unit = <!-- Unit for fast speed. Default: GHz -->
| fsb-slowest = <!-- Slowest FSB speed -->
| fsb-fastest = <!-- Fastest FSB speed -->
| fsb-slow-unit = <!-- Unit for slow speed. Default: MHz -->
| fsb-fast-unit = <!-- Unit for fast speed. Default: MHz -->
| hypertransport-slowest = <!-- Slowest HyperTransport speed -->
| hypertransport-fastest = <!-- Fastest HyperTransport speed -->
| hypertransport-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| hypertransport-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| qpi-slowest = <!-- Slowest QPI (QuickPath Interconnect) speed -->
| qpi-fastest = <!-- Fastest QPI speed -->
| qpi-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| qpi-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| dmi-slowest = <!-- Slowest DMI (Direct Media Interface) speed -->
| dmi-fastest = <!-- Fastest DMI speed -->
| dmi-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| dmi-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| data-width = <!-- Data bus width in bits -->
| address-width = <!-- Address bus width in bits -->
| virtual-width = <!-- Virtual address bus width in bits -->
<!-------------------- Cache ----------------------------------------------------------------------------------------->
| l1cache = <!-- Level 1 cache size -->
| l2cache = <!-- Level 2 cache size -->
| l3cache = <!-- Level 3 cache size -->
| l4cache = <!-- Level 4 cache size -->
| llcache = <!-- Last Level cache size -->
<!------- Architecture and classification ---------------------------------------------------------------------------->
| application = <!-- Typical application (Embedded, Mobile, Desktop, Server) -->
| size-from = <!-- First fabrication size -->
| size-to = <!-- Second fabrication size -->
| microarch = <!-- Microarchitecture of the CPU -->
| arch = <!-- Instruction set architecture (ISA) that the CPU implements →see talkpage section #Architecture -->
| instructions = <!-- Instruction sets →see talkpage section #Architecture -->
| extensions = <!-- Extensions to the instructions -->
| numinstructions = <!-- Number of instructions -->
<!----------- Physical specifications -------------------------------------------------------------------------------->
| transistors = <!-- Number of transistors, transistor count -->
| numcores = <!-- Number of cores (2 for dual-core) -->
| amountmemory = <!-- Amount of system RAM for SoC or SiP -->
| gpu = <!-- Integrated GPU -->
| co-processor = <!-- A [[co-processor]](s) used together -->
| pack1 = <!-- (1..5) Names of CPU packages -->
| sock1 = <!-- (1..9) Names of the sockets that the CPU was made for -->
<!--------- Products, models, variants ------------------------------------------------------------------------------->
| core1 = <!-- (1..9) Names of the cores →see talkpage section "Names (Products, models, variants)" -->
| pcode1 = <!-- (1..9) Product code names →see talkpage section "Names (Products, models, variants)" -->
| model1 = <!-- (1..9) Model names →see talkpage section "Names (Products, models, variants)" -->
| brand1 = <!-- (1..9) Marketing names of the CPU -->
| variant = <!-- Variants in the same family and generation →see talkpage section "Names (Products, models, variants)" -->
<!------------------ History --------------------------------------------------------------------------------------->
| predecessor = <!-- What CPU came before -->
| successor = <!-- What CPU came after -->
<!------------------ Support status --------------------------------------------------------------------------------->
| support status = <!-- Current support status -->
}}
- All fields, except
name
are optional - The following parameters are deprecated:
created
→better: produced-start
,produced-end
clock
→better: slowest
,fastest
fsb
→better: fsb-slowest
,fsb-fastest
cores
,cores1
→better: numcores
socket
→better: sock1
...sock9
manuf
,core
,sock
,pack
,arch
, andmicroarch
are AutoLinks, so you can use plain text or a link for them.- The numbered attributes mean that there is allowance for multiples.
- See the talk page for some examples which show the full usage of this infobox in a few combinations.